FB1
FB2
FB3
FB4
FB5
FB6
FB7
FB8
Signal Name
Total Product Terms
Product Terms
Location
Power Mode
Pin Number
PinType
Pin Use
$OpTx$FX_DC$515
1
1_1
MC1
LOW
(b)
(b)
track_hi<5>
5
2_1
2_2
2_3
2_4
2_5
MC2
LOW
74
I/O
O
happy_a12__or0001/happy_a12__or0001_D2
2
3_1
3_2
MC3
LOW
(b)
(b)
N64/N64_D2
2
4_1
4_2
MC4
LOW
(b)
(b)
track_hi<4>
4
5_1
5_2
5_3
5_4
MC5
LOW
76
I/O
O
track_hi<3>
4
6_1
6_2
6_3
6_4
MC6
LOW
77
I/O
O
$OpTx$FX_SC$520
2
7_1
7_2
MC7
LOW
(b)
(b)
track_hi<2>
4
8_1
8_2
8_3
8_4
MC8
LOW
78
I/O
O
track_hi<1>
3
9_1
9_2
9_3
MC9
LOW
79
I/O
O
$OpTx$FX_DC$531
2
10_1
10_2
MC10
LOW
(b)
(b)
cfg_led
2
11_1
11_2
MC11
LOW
80
I/O
O
track_hi<0>
4
12_1
12_2
12_3
12_4
MC12
LOW
81
I/O
O
$OpTx$FX_DC$492
3
12_5
13_1
13_2
MC13
LOW
(b)
(b)
track_lo<6>
6
13_3
13_4
13_5
14_1
14_2
14_3
MC14
LOW
82
I/O
O
track_lo<5>
7
14_4
14_5
15_1
15_2
15_3
15_4
15_5
MC15
LOW
85
I/O
O
check_1050_6810_access_mux0001/check_1050_6810_access_mux0001_D2
5
16_1
16_2
16_3
16_4
16_5
MC16
LOW
(b)
(b)
track_lo<4>
6
17_1
17_2
17_3
17_4
17_5
18_5
MC17
LOW
86
I/O
O
$OpTx$FX_DC$554
8
18_1
18_2
18_3
18_4
1_1
1_2
1_3
1_5
MC18
LOW
(b)
(b)
Signals Used By Logic in Function Block
$OpTx$FX_DC$461
$OpTx$FX_DC$475
$OpTx$FX_DC$529
N11/N11_D2
data<6>.PIN
data<5>.PIN
data<4>.PIN
data<3>.PIN
data<2>.PIN
data<1>.PIN
data<0>.PIN
N2/N2_D2
adr<0>
adr<10>
adr<11>
adr<12>
adr<13>
adr<14>
adr<15>
adr<1>
adr<4>
adr<5>
adr<6>
adr<7>
adr<8>
adr<9>
cfg_led
floppy_mode<0>
floppy_mode<1>
floppy_mode<2>
floppy_mode<3>
reset
rom_bank_c000_enable<0>
rw
track_hi<0>
track_hi<1>
track_hi<2>
track_hi<3>
track_hi<4>
track_hi<5>
track_lo<4>
track_lo<5>
track_lo<6>